Ask about our new p4c (P4 compiler) for NIC targets via email and under NDA.
For newbies to P4 who are looking for hardware to try P4 with, a list is maintained by us at this link: https://github.com/hesingh/p4-info
Welcome to our home page. The above picture depicts one of our core competencies - develop sequential to pipelined code in compilers for ASICs. We have successfully developed a p4c backend for one programmable switching asic vendor. The asic has a programmable parser, pipeline, Update/ReadWrite (URW), multicast replication engine, and memory.
Further, P4Runtime is obsoleting OpenFlow because OpenFlow is not protocol-independent. P4Runtime + gNMI + gNOI (Stratum Project) is replacing OpenFlow. P4Runtime is also better than SAI because SAI API changes can take up to 6 months. Additionally, since 2014, top universities in the world are producing research with running code in P4. MIT Domino asic design tool outputs P4. The HULA congestion control algorithm developed running code in P4. Fine-grained data plane measurements are also developed in P4. This research train does not look like it's stopping. The Stanford Mininet simulator and p4c bmv2 backend allows researchers to quickly test new data plane algorithms.
In the June 2018 Stanford P4 Workshop, a Cisco paper quoted "Who can code in P4 today?" See slide 3 of https://p4.org/assets/P4WS_2018/Mario_Baldi.pdf. This is the unique talent of our company because one could still find new university graduates with P4 programming experience, but which student will have over 9 years of real hardware data plane programming (Cisco and Xpliant/Cavium) experience and 2 years of P4 compiler development for a switching asic? This is the talent with MNK Consulting.